1. Field of the Invention
This invention relates to integrated circuits using complementary metal oxide semiconductors (CMOS), which circuits exhibit hysteresis such that the circuit output switches between high and low voltage levels in response to input voltage causing the switching to occur in a first direction at an input voltage which differs from the voltage causing switching in an opposite direction by an incremental hysteresis voltage.
2. Prior Art
U.S. Pat. Nos. 4,110,641 to Payne and 4,394,587 to McKenzie et al disclose CMOS comparators with hysteresis, each having a current mirror circuit connected to a differential pair of transistors.
The patent to McKenzie et al teaches a hysteresis circuit added to a differential comparator to provide a predetermined bias current from one of two input transistors connected in a differential configuration. A current mirror structure is used to accurately determine the amount of current which is shunted when the output of the comparator is in a predetermined state. In accordance with this patent, the hysteresis is a function of device sizes and device characteristics which is influenced by manufacturing process and temperature various. Further, the hysteresis is also a function of current source 38 shown in FIG. 1 of the McKenzie et al patent. There is no teaching of how a constant current sink operates to null out manufacturing process and temperature effects in order to maintain a predetermined and a fixed hysteresis.
The patent to Payne teaches a CMOS voltage comparator with internal positive current feedback to achieve a predetermined hysteresis. The voltage level at which the switching occurs can be set. Hysteresis is introduced such that when the set voltage level is exceeded, the output switches and will remain in that state until the input voltage drops by a predetermined hysteresis voltage. The patent teaches hysteresis in both directions of the input signal, one being positive and one being negative. Although the circuit hysteresis is controllable, it is not precisely predictable as would be desired. The patent requires a constant current, which is not described, to control the hysteresis and which must be continuously adjusted to control the hysteresis as precisely as desired over temperature and process variations. That is, there is no automatic adjustment for such variations.
U.S. Pat. No. 4,047,059 issued to Rosenthal teaches a comparator which has no means for hysteresis and thus detects only the differential input zero crossing while maintaining information on the common mode signal component.
U.S. Pat. No. 4,556,805 issued to Shoji teaches a comparator circuit with a hysteresis characteristic comprising an amplifier comparing an input voltage with a reference voltage, a voltage-clamping circuit clamping the output voltage of the amplifier at a first stabilized voltage or at a second stabilized voltage in response to the comparison output of the amplifier, and a feedback circuit generating a first feedback voltage or a second feedback voltage as the reference voltage in response to the output voltage level of the amplifier, whereby the hysteresis voltage of the comparator circuit is substantially independent of the variation in a power supply voltage for actuating the comparator circuit. The patent does not teach a fully differential circuit. In other words, one input is tied up for the purpose of receiving a hysteresis signal. Thus the input signal is sensed with respect to ground. In a differential comparator, one input is compared against the other, both of which may have input signals on them.
U.S. Pat. No. 4,438,349 issued to Shoji teaches a hysteresis circuit wherein hysteresis is dependent on device characteristics and thus dependent on processing and temperature. Advantageously, more precision would be desired without such dependence.
U.S. Pat. No. 4,069,431 issued to Kucharewski teaches a current mirror amplifier with controlled current gain, the current gain being changed responsive to the output condition of a comparator in which the current mirror amplifier is used in a differential signal combining circuit. In such a comparator application the switched gain of the current mirror amplifier imparts hysteresis to the comparator characteristics. However, it would be desirable to have control over hysteresis to be more precise and not to depend on process, temperature and supply voltage variations. Further, it would be desirable to better control the amount of feedback provided by the feedback circuit so as to compensate for process and temperature variation.
U.S. Pat. No. 4,096,430 issued to Waldron teaches a MOS voltage reference including four MOS transistors connected in feedback circuit relationship, with the ratio of device width to length being essentially the same in the first two devices in order to provide an output voltage which is substantially constant over a range of input voltages and of temperatures.
It would be desirable to have a precision comparator in order to be able to detect small signals from a variable reluctance sensor and to be insensitive to manufacturing process or temperature variation. Further, it would be desirable that such a circuit be implemented by a digital CMOS process which can be used to perform logic functions, one of which would be to digitally filter noise. Further, it would be advantageous to have a comparator with hysteresis levels which can be digitally adjusted in a precise fashion so that as signal levels increase hysteresis can increase to further aid noise rejection. These are some of the problems this invention overcomes.